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Proceedings of the First International Workshop on HyperTransport Research and Applications (WHTRA2009)(revised 08/2009)

Weitere Beteiligte (Hrsg. etc.): Fröning, Holger (Hrsg.), Nüssle, Mondrian (Hrsg.), García García, Pedro Javier (Hrsg.)

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Gedruckte Ausgabe:
SWD-Schlagwörter:		Computerarchitektur
Freie Schlagwörter (Deutsch):		Computernetzwerke , Accelerators
Freie Schlagwörter (Englisch):		computer architecture , computer networks , accelerators
Institut:		Institut f. Technische Informatik (ZITI)
DDC-Sachgruppe:		Informatik
Dokumentart:		Proceedings (Komplette Ausgabe einer Konferenz etc.)
ISBN:		978-3-00-027249-3
Sprache:		Englisch
Erstellungsjahr:		2009
Publikationsdatum:		31.08.2009
Bemerkung:		Aktualisierte Version des Dokuments mit der URN: urn:nbn:de:bsz:16-opus-91102, URL: http://www.ub.uni-heidelberg.de/archiv/9110.
Kurzfassung in Englisch:		Proceedings of the First International Workshop on HyperTransport Research and Applications (WHTRA2009) which was held Feb. 12th 2009 in Mannheim, Germany. The 1st International Workshop for Research on HyperTransport is an international high quality forum for scientists, researches and developers working in the area of HyperTransport. This includes not only developments and research in HyperTransport itself, but also work which is based on or enabled by HyperTransport. HyperTransport (HT) is an interconnection technology which is typically used as system interconnect in modern computer systems, connecting the CPUs among each other and with the I/O bridges. Primarily designed as interconnect between high performance CPUs it provides an extremely low latency, high bandwidth and excellent scalability. The definition of the HTX connector allows the use of HT even for add-in cards. In opposition to other peripheral interconnect technologies like PCI-Express no protocol conversion or intermediate bridging is necessary. HT is a direct connection between device and CPU with minimal latency. Another advantage is the possibility of cache coherent devices. Because of these properties HT is of high interest for high performance I/O like networking and storage, but also for co-processing and acceleration based on ASIC or FPGA technologies. In particular acceleration sees a resurgence of interest today. One reason is the possibility to reduce power consumption by the use of accelerators. In the area of parallel computing the low latency communication allows for fine grain communication schemes and is perfectly suited for scalable systems. Summing up, HT technology offers key advantages and great performance to any research aspect related to or based on interconnects. For more information please consult the workshop website (http://whtra.uni-hd.de).
Lizenz:		Veröffentlichungsvertrag für Publikationen mit Print on Demand