title: System-level Prototyping with HyperTransport
creator: Watson, Myles
creator: Flanagan, Kelly
subject: ddc-004
subject: 004 Data processing Computer science
description: The complexity of computer systems continues to increase. Emulation of proposed subsystems is one way to manage this growing complexity when evaluating the performance of proposed architectures. HyperTransport allows researchers to connect directly to microprocessors with FPGAs. This enables the emulation of novel memory hierarchies, non-volatile memory designs, coprocessors, and other architectural changes, combined with an existing system.
date: 2011
type: Article
type: info:eu-repo/semantics/article
type: NonPeerReviewed
format: application/pdf
identifier: https://archiv.ub.uni-heidelberg.de/volltextserverhttps://archiv.ub.uni-heidelberg.de/volltextserver/11587/1/WHTRA2011_paper03.pdf
identifier: DOI:10.11588/heidok.00011587
identifier: urn:nbn:de:bsz:16-opus-115874
identifier:   Watson, Myles ; Flanagan, Kelly  (2011) System-level Prototyping with HyperTransport.         
relation: https://archiv.ub.uni-heidelberg.de/volltextserver/11587/
rights: info:eu-repo/semantics/openAccess
rights: http://archiv.ub.uni-heidelberg.de/volltextserver/help/license_urhg.html
language: eng