eprintid: 22273
rev_number: 13
eprint_status: archive
userid: 2868
dir: disk0/00/02/22/73
datestamp: 2016-12-07 06:59:05
lastmod: 2016-12-07 10:01:06
status_changed: 2016-12-07 06:59:05
type: doctoralThesis
metadata_visibility: show
creators_name: Erdinger, Florian
title: Design of Front End Electronics and a
Full Scale 4k Pixel Readout ASIC for the
DSSC X-ray Detector at the European XFEL
subjects: ddc-000
subjects: ddc-530
divisions: i-720000
adv_faculty: af-13
abstract: The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor
with Signal Compression (DSSC) detector system which is being developed by an international
collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single
photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons
at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal
compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the
pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which
includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises
4096 pixels and a full periphery including biasing and digital control. This thesis presents the design
of the ASIC, its components and integration are decribed in detail. Emphasis is put on the design of
the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this
thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are
presented to create the context for the ASIC, which is the core topic of this thesis.
date: 2016
id_scheme: DOI
id_number: 10.11588/heidok.00022273
ppn_swb: 1654420506
own_urn: urn:nbn:de:bsz:16-heidok-222733
date_accepted: 2016-11-22
advisor: HASH(0x558eaa6a3800)
language: eng
bibsort: ERDINGERFLDESIGNOFFR2016
full_text_status: public
citation:   Erdinger, Florian  (2016) Design of Front End Electronics and a Full Scale 4k Pixel Readout ASIC for the DSSC X-ray Detector at the European XFEL.  [Dissertation]     
document_url: https://archiv.ub.uni-heidelberg.de/volltextserver/22273/1/Thesis_Erdinger.pdf