title: Modelling and performance analysis of  multigigabit serial interconnects using real  number based analog verification methods
creator: Thürmer, Maximilian
subject: 004
subject: 004 Data processing Computer science
subject: 600
subject: 600 Technology (Applied sciences)
subject: 620
subject: 620 Engineering and allied operations
description: The increasing importance of multigigabit transceiver circuits in modern chip design calls for new methods of analyzing and integrating these challenging building blocks. This work presents a design and analysis framework basend on the SystemVerilog real number modeling ansatz. It further extends the simulation possibilities thus obtained by introducing additional higher level numeric modelling and evaluation methods to support multigigabit statistical link budgeting procedures based on the Peak Distortion Algorithm.
date: 2018
type: Dissertation
type: info:eu-repo/semantics/doctoralThesis
type: NonPeerReviewed
format: application/pdf
identifier: https://archiv.ub.uni-heidelberg.de/volltextserverhttps://archiv.ub.uni-heidelberg.de/volltextserver/23838/1/dissertation_thuermer.pdf
identifier: DOI:10.11588/heidok.00023838
identifier: urn:nbn:de:bsz:16-heidok-238385
identifier:   Thürmer, Maximilian  (2018) Modelling and performance analysis of multigigabit serial interconnects using real number based analog verification methods.  [Dissertation]     
relation: https://archiv.ub.uni-heidelberg.de/volltextserver/23838/
rights: info:eu-repo/semantics/openAccess
rights: Please see front page of the work (Sorry, Dublin Core plugin does not recognise license id)
language: eng