%0 Generic
%A Schmidt, Hartmut Heiner
%C Heidelberg
%D 2024
%F heidok:34446
%R 10.11588/heidok.00034446
%T Large-Scale Experiments on Wafer-Scale Neuromorphic Hardware
%U https://archiv.ub.uni-heidelberg.de/volltextserver/34446/
%X Neuromorphic hardware addresses the limitations of traditional computers, particularly in terms of power consumption and simulation speed when handling neural networks. The first-generation BrainScaleS system achieves this by physically implementing neurons and synapses with analog circuits, complemented by the utilization of wafer-scale integration to realize high circuit counts. However, both techniques come with the compromise of limited control over the system, constraining previous emulations to small network sizes. This thesis introduces an optimized approach to hardware utilization that enables the execution of large-scale experiments. Techniques are developed that address hardware defects, reduce parameter variations through extended calibrations, increase neuron and synapse utilization by enhancing the routing capabilities, and bypass undesired circuit behaviors. Building upon these improvements, a precise model of hardware behavior is generated. This model serves as a foundation for aligning two large-scale biological networks with the inherent constraints of the hardware. To achieve this alignment, methods are developed that facilitate the necessary modifications while preserving biological behavior. By emulating these adapted network descriptions, the thesis demonstrates the system’s capabilities for large-scale experiments and enables performance comparisons with other simulators.