eprintid: 9118
rev_number: 13
eprint_status: archive
userid: 1
dir: disk0/00/00/91/18
datestamp: 2009-03-03 11:43:47
lastmod: 2015-12-28 05:38:35
status_changed: 2012-08-14 15:28:15
type: article
metadata_visibility: show
creators_name: Strunk, Jochen
creators_name: Heinig, Andreas
creators_name: Volkmer, Toni
creators_name: Rehm, Wolfgang
creators_name: Schikc, Heiko
title: Run-Time Reconfiguration for HyperTransport coupled FPGAs using ACCFS
ispublished: pub
subjects: 004
divisions: 720000
cterms_swd: Computerarchitektur
abstract: In this paper we present a solution where only one FPGA is needed in a host coupled system, in which the FPGA can be reconfigured by a user application during run-time without loosing the host link connection. A hardware infrastructure on the FPGA and the software framework ACCFS (ACCelerator File System) on the host system is provided to the user which allow easy handling of reconfiguration and communication between the host and the FPGA. Such a system can be used for offloading compute kernels on the FPGA in high performance computing or exchanging functionality in highly available systems during run-time without loosing the host link during reconfiguration. The implementation was done for a HyperTransport coupled FPGA. The design of a HyperTransport cave was extended in such a way that it provides an infrastructure for run-time reconfigurable (RTR) modules.
abstract_translated_lang: eng
date: 2009
date_type: published
id_scheme: DOI
id_number: 10.11588/heidok.00009118
portal_cluster_id: p-whtra09
portal_order: 1
ppn_swb: 1373993324
own_urn: urn:nbn:de:bsz:16-opus-91184
language: eng
bibsort: STRUNKJOCHRUNTIMEREC2009
full_text_status: public
citation:   Strunk, Jochen ; Heinig, Andreas ; Volkmer, Toni ; Rehm, Wolfgang ; Schikc, Heiko  (2009) Run-Time Reconfiguration for HyperTransport coupled FPGAs using ACCFS.         
document_url: https://archiv.ub.uni-heidelberg.de/volltextserver/9118/1/whtra09_paper17.pdf