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Modelling and performance analysis of multigigabit serial interconnects using real number based analog verification methods

Thürmer, Maximilian

German Title: Modellierung und Leistungsanalyse von Multigigabit Transceivern mittels zeitdiskreten und wertkontinuierlichen, analogen Verifikationsmethoden

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Abstract

The increasing importance of multigigabit transceiver circuits in modern chip design calls for new methods of analyzing and integrating these challenging building blocks. This work presents a design and analysis framework basend on the SystemVerilog real number modeling ansatz. It further extends the simulation possibilities thus obtained by introducing additional higher level numeric modelling and evaluation methods to support multigigabit statistical link budgeting procedures based on the Peak Distortion Algorithm.

Item Type: Dissertation
Supervisor: Brüning, Prof. Dr. Ulrich
Place of Publication: Heidelberg
Date of thesis defense: 20 November 2017
Date Deposited: 19 Jan 2018 08:07
Date: 2018
Faculties / Institutes: The Faculty of Mathematics and Computer Science > Department of Computer Science
Subjects: 004 Data processing Computer science
600 Technology (Applied sciences)
620 Engineering and allied operations
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