Vorschau

PDF, Englisch Download (3MB) | Nutzungsbedingungen

Abstract

Analog implementations of neural networks have several advantages over computer simulations: they are usually faster, more energy efficient and fault-tolerant. However, compared to purely digital systems, analog hardware is subject to transistor size mis- matches. For neuromorphic systems, and in particular for neuron circuits, this means that there will be neuron-to-neuron variations on the chip, resulting in a different behav- ior for each hardware neuron. This is why a calibration step is necessary to compensate these variations, and guarantee a correct operation of all neuron circuits.

This thesis presents a software framework to automatically convert the parameters of a neuron models written in a description language, PyNN, to parameters which will be used to configure the hardware system, while making sure that the hardware neurons behave in the same way that their theoretical counterparts. After a theoretical analysis, this framework is applied both on transistor-level level simulations of the hardware as well as on the hardware system itself. Finally, the software framework is used to emulate some simple neural networks on the neuromorphic hardware system.